The present invention generally relates to a spread spectrum communication system, and more particularly to a spread spectrum communication system in which spread spectrum modulation is used to modulate a clock used to generate a pseudo noise code sequence. The spread spectrum communication system is applicable to wireless communications including indoor radio communications and mobile communications.
There have been proposed some types of spread spectrum (SS) communication systems as a data transmission system enabling increased immunity to noise, increased resistance to interference and security of transmitted information. Among the SS communication systems, there are a direct sequence (DS/SS) communication system and a frequency hopping (FH/SS) communication system. In the DS/SS communication, a signal modulated with information is multiplied with a pseudo noise (pn) code sequence which is generated by a pn code generator. In the FH/SS communication, a carrier frequency of the modulated signal is shifted in accordance with a prescribed pattern.
Among the SS communication systems, there is also another type of SS communication system which is more simple and more feasible than the above mentioned systems. This SS communication system utilizes clock rate modulation (CRM) for data transmission, which is disclosed in "Spread Spectrum Systems" by R. C. Dixon, John Wiley & Sons, 1976, pp. 116-117. In this CRM/SS communication, a clock input to the pn code generator is frequency-modulated in accordance with a digital data signal.
When a digital signal produced through the CRM/SS is transmitted at a transmitter of the CRM/SS system mentioned above, a pn code clock used to generate the pn code sequence is subjected to frequency shift keying (FSK) to modulate the frequency of the pn code clock with the data signal. When the transmitted signal is received at a receiver, a delay locked loop (DLL) of the receiver performs a pn signal synchronization and feedback control so as to generate a second pn code sequence synchronuously with the transmitted signal. Then, at the receiver, a demodulated signal is produced from a small control signal of a voltage controlled oscillator (OSC) of the DLL. Because this control signal is very small, amplification of the control signal and noise reduction therefrom are performed at a waveform shaper of the receiver, and a bit timing of the demodulation is taken from the amplified signal by using a phase locked loop (PLL) or the like so that data corresponding to the digital data signal is reproduced from the transmitted signal.
However, in the above mentioned CRM/SS system, it is necessary to use an expensive, somewhat complicated PLL circuit in order to accomplish the bit timing synchronization. Also, there is a problem in that fluctuations of the phase or level of the demodulated signal may occur due to noises, power changes and temperature changes at the waveform shaper and the DLL, thereby producing errors of the demodulation. Therefore, when the above mentioned CRM/SS system is used, it is difficult to accurately demodulate the transmitted signal so as to reproduce the corresponding digital data.